Although each unit operation has its own format, unit operations have a common element - an expression. An expression consists of operators and references.
The operators used in SFL are listed in Table 3.4. If there are a number of operators with the same priority in an expression, they are evaluated "from right to left".
^/|a<7:4> + (^20#\b)<3:0>
The above means the following. First, "b" is encoded. The result is extended to 20 bits, and is then negated. Bit 3 to bit 0 of the result is extracted. Suppose this is called X. Then, bit 7 to bit 4 of "a" is extracted and the result ORed in the bit direction starting with the LSB. This result is also negated. Suppose the result is called Y. The final result of the expression is Y plus X.
Any operator can be used with functional circuits. With modules, there are some restrictions; decode, encode, addition, bit right shift, and bit left shift cannot be used, and the right-side item in the equivalence operator must be a constant.
Operand digit positions (bit positions) are numbered 0, 1, 2, ... from LSB.
Logical operation is performed bit by bit. For OR(|), EOR(@), and AND(&), the bit widths of two operands must be the same.
In concatenation, the left term is on the MSB side and the right term is on the LSB side of the concatenated value.
In bit shift, the left term is shifted by the value specified by the right term assuming it is binary data. The bit width of the result is the same as that of the left term. Right shift inserts "0" from MSB, while left shift inserts "0" from LSB. The right term specifying the number of shifts is an expression.
In the equivalence operation, the bit widths must be the same for the left and right terms. The result of equivalence operation is of one bit. If all values of the left and right terms are the same bit by bit, the result is "1". Otherwise, "0".
In the logical operation in the bit direction, each bit of the operand is operated on. The result is of one bit.
In addition, the bit widths of the operands concerned need not be the same. The bit width of the result is equal to the wider bit width of each operand. In cases where the carry is to be taken into account, the number of bits should be increased by one.
<Table 3.4> SFL operators
If a negative value is expressed by twos complement, subtraction can be defined by the following (but only when the bit widths are the same for A and B)
A - B = A + ^B + 0b1
Decode operation converts a value, assuming it is binary, into a bit position (LSB position is value 0). When the bit width of the operand is "n", the bit width of the result is 2n. For example:
/0b000 /0b110 /0b111
are decoded into 0b00000001, 0b01000000 and 0b10000000, respectively.
Encode is the reverse operation of decode. The position of "1" nearest to MSB in the operand is encoded (priority encoded). For example:
\0b00000001 \0b01000011 \0b10000000 \0b00000000
are encoded into 0b0000, 0b0110, 0b0111, and 0b1000, respectively. The bit width of the operand must be a power of 2. If an n-bit operand is encoded, the bit width of the result is "log2n + 1". For example, encoding an 8-bit operand yields a 4-bit result as shown above. If all the bits of the operand are "0", the MSB of the result becomes "1".
Sign extension concatenates bits with each taking the value of the MSB of the operand on the MSB side. The bit width of the result become the number specified by the left side of the operand. If the specified number of bit width is narrower than that of the operand, the MSB-side of the operand is simply lost.
Bit extraction extracts or reverses any portion of the operand. For example:
a<7:4>, a<5>, a<4:7>
means respectively: bits 7 to 4 of "a" are extracted; bit 5 of "a" is extracted; and bits 7 to 4 of "a" are extracted and then the MSB and LSB sides are reversed. If the specified number of bits is larger than that of the operand, it is assumed that there are "0"s to the MSB side of the operand.
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