NAKAMURA, Yukihiro

Professor

Department of Communications and Computer Engineering
Graduate School of Informatics
Kyoto University
Kyoto 606-8501, Japan

Phone: +81-75-753-4801
Fax: +81-75-753-4802
Email: nakamura@i.kyoto-u.ac.jp
Office: Engineering Bld. 3, Room S305

Areas of Interest:

• Highly parallel computer architecture and its design methodology
• Non‐Von Neumann computer architecture and its design methodology
• Design methods for key‐processors in harmonized environments between　multimedia and communication
• Design, implementation, and exploration of multimedia system architecture
• Distance training system for education in VLSI design

Representative Publications:

• H. Tsutsui, T. Masuzaki, M. Oyamatsu, T. Izumi, T. Onoye, Y. Nakamura, "Design of JPEG2000 Encoder for Fully Scalable Image Coding", in Proc. of the 5th World Multi-Conference on Systemics, Cybernetics and Informatics, July 2001.
• K. Chikamura, T. Izumi, T. Onoye, Y. Nakamura, "IEEE1394 System Simulation Environment and a Design of its Link Layer Controller", in Proc. of 2001 IEEE International Symposium on Circuits and Systems, pp.V1-4, May 2001.
• H. Tsutsui, K. Hiwada, T. Izumi, T. Onoye, Y. Nakamura, "A Design of LUT-Array-Based PLD and a Synthesis Approach Based on Sum of Generalized Complex Terms Expression", in Proc. of 2001 IEEE International Symposium on Circuits and Systems, pp.V203-206, May 2001.
• T. Izumi, R. Kan, Y. Nakamura, "Array-Based Mapping Algorithm of Logic Functions into Plastic Cell Architecture", IEICE Trans. on Fundamentals, Vol. E83-A, No.12, pp.2538-2544, December 2000.
• D. Murakami, T. Izumi, T. Onoye, Y. Nakamura, "A Hardware Algorithm of Dynamic Area Allocation to Circuits for Plastic Cell Architecture," in Proc. of SCS Euromedia Conference, pp.85-59, May 2000.
• T. Izumi, R. Kan, Y. Nakamura, "Array-Based Mapping Algorithm of Logic Functions into Plastic Cell Architecture," in Proc. of 9th Workshop of Synthesis And System Integration of MIxed Technologies, pp.91-98, April 2000.

Academic Degree: Doctor of Engineering (Kyoto University)

Academic Society:

• a member of
  IEEE (The Institute of Electronics, Information and Communication Engineers),
  ACM (The Association for Computing Machinery),
  IEICE (The Institute of Electronics, Information and Communication Engineers),
  IPSJ (The Information Processing Society of Japan), and
  PARTHENON Technical Society.
• the Asian Representative and the Program Chair of ISSS (The IEEE&ACM International Symposium on Systems Synthesis) (2000- and 2002, respectively)
• the Technical Program Chair and the General Co-chair of SASIMI (Synthesis And System Integration of MIxed Technologies) (2000 and 2001, respectively)
• an Associate Editor of JCSC (The Journal of Circuits, Systems and Computers) (1998-)
• an Associate Editor of TODAES (The ACM Transactions on Design Automation of Electronic Systems) (1995-)
• an Associate Editor of the IEEE Transactions on VLSI Systems (1992-1997)
• the Asian Representative of ICCAD (The IEEE&ACM International Conference on Computer Aided Design) (1990-1992)
• the chair of IEEE Kansai Section Student Activities Committee (1999-)
• the chair of the PARTHENON Technical Society (1999-)
• the chair of DA-SLDM (The IPSJ Special Interest Group on System LSI Design Methodology) (1994-1996)
• an Associate Editor of the IEICE Transactions (1990-1992)
• etc.

Courses:

• Graduate Courses:
  Integrated System Architecture and Synthesis, High-Level Design Methodology for System LSIs

• Undergraduate Courses:
  Computer Systems

Further Information:

• Homepage of our Lab.

Last Updated: July 2001